The VESA Local Bus (usually abbreviated to VL-Bus or VLB) was mostly acclimated in claimed computers. VESA (Video Electronics Standards Association) Local Bus formed alongside the ISA bus; it acted as a accelerated aqueduct for memory-mapped I/O and DMA, while the ISA bus handled interrupts and port-mapped I/O.
Sunday, February 5, 2012
Historical overview
In the aboriginal 1990s the I/O bandwidth of the ISA bus was acceptable a analytical aqueduct to PC cartoon performance. The charge for faster cartoon was getting apprenticed by accretion acceptance of Graphical User Interfaces in PC operating systems. While IBM's attack at bearing a almsman to ISA with the Micro Channel Architecture was a technically applicable option, it bootless in the bazaar due to its proprietary attributes and imposed licensing fees. The aggressive EISA accessible accepted was still clumsy to action abundant achievement advance over ISA to accommodate a solution. Thus for a abbreviate time, accouterments producers created proprietary implementations of bounded busses on their motherboards to accord cartoon cards absolute admission to the processor and arrangement anamnesis - and abstain the limitations of the ISA bus. However as these architect specific solutions were not standardized, there were no accoutrement for accouterment interoperability amid them. This led to the VESA bunch proposing and defining a Bounded Bus accepted in 1992.1 Additionally while greater cartoon agenda achievement was a primary ambition of VLB, added accessories could aswell account from the VLB standard; conspicuously abounding accumulation accumulator controllers were offered for VLB with added harder deejay performance.
A "VLB slot" itself was artlessly an added bend adapter placed in-line with the acceptable ISA or EISA connector, with this continued allocation generally black a characteristic brown. The aftereffect was a accustomed ISA or EISA aperture getting additionally able of accepting VLB accordant cards. Acceptable ISA cards remained accordant as they would not accept pins accomplished the accustomed ISA or EISA allocation of the slot. The about-face was aswell accurate - VLB cards were by call absolutely continued in adjustment to ability the VLB connector, and were evocative of beforehand feature amplification cards from the beforehand IBM XT era. Ironically the VLB allocation of a aperture looked agnate to a IBM MCA slot, as absolutely it was the aforementioned concrete 116 pin adapter acclimated by MCA cards rotated by 180 degrees. The IBM MCA accepted had not been as accepted as IBM accepted and there was an abounding surplus of the connector, authoritative it bargain and readily available.citation needed
A "VLB slot" itself was artlessly an added bend adapter placed in-line with the acceptable ISA or EISA connector, with this continued allocation generally black a characteristic brown. The aftereffect was a accustomed ISA or EISA aperture getting additionally able of accepting VLB accordant cards. Acceptable ISA cards remained accordant as they would not accept pins accomplished the accustomed ISA or EISA allocation of the slot. The about-face was aswell accurate - VLB cards were by call absolutely continued in adjustment to ability the VLB connector, and were evocative of beforehand feature amplification cards from the beforehand IBM XT era. Ironically the VLB allocation of a aperture looked agnate to a IBM MCA slot, as absolutely it was the aforementioned concrete 116 pin adapter acclimated by MCA cards rotated by 180 degrees. The IBM MCA accepted had not been as accepted as IBM accepted and there was an abounding surplus of the connector, authoritative it bargain and readily available.citation needed
Limitations
The VESA Bounded Bus was advised as a band-aid band-aid to the botheration of the ISA bus's bound bandwidth. As such, one claim for VLB to accretion industry acceptance was that it had to be a basal accountability for articles to implement, in agreement of lath re-design and basic costs - contrarily manufacturers would not accept been assertive to change from their own proprietary solutions. As VLB fundamentally angry a agenda anon to the 486 processor bus with basal agent argumentation (reducing argumentation architecture and basic costs), timing and adjudication duties were acerb abased on the cards and CPU.citation needed This artlessness of VLB abominably created several factors that served to absolute its advantageous activity substantially:
80486 dependence. The VESA Bounded Bus relied heavily on the Intel 80486 CPU's anamnesis bus design.citation needed If the Pentium processor accustomed there were above differences in its bus design, and was not calmly adjustable to a VESA Bounded Bus implementation. Few Pentium motherboards with VLB slots were anytime made. Aswell affective the bus to non-x86 architectures was about impossible.
Bound amount of slots available. Most PCs that acclimated VESA Bounded Bus had alone one or two VLB able ISA slots from the 5 or 6 accessible (thus 4 ISA slots about were just that, ISA only). This was a aftereffect of VESA Bounded Bus getting a absolute annex of the 80486 anamnesis bus. The processor did not accept the electrical adeptness to accurately drive (signal and power) added than 2 or 3citation needed accessories at a time anon from this bus.
Believability problems. The austere electrical limitations on the bus aswell bargain any "safety margin" accessible - abnormally influencing reliability. Glitches amid cards were common, as the alternation amid alone cards, combinations of cards, motherboard implementation, and even the processor itself was difficult to predict. This was abnormally accustomed on lower-end motherboards, as the accession of added VLB cards could beat an already bordering implementation. Results could be rather amazing if generally important accessories such as harder deejay controllers were complex with a bus battle with a anamnesis accelerated accessory such as the all-over video card. As VLB accessories had absolute accelerated admission to arrangement anamnesis at the aforementioned akin as the capital processor, there was no way for the arrangement to arbitrate if accessories were mis-configured or became unstable. If two accessories overwrote the aforementioned anamnesis area in a conflict, and the harder deejay ambassador relied on this area (the HDD ambassador generally getting the 2nd adverse device) there was the all-too-common achievability of massive abstracts corruption.
Bound scalability. As bus speeds of 486 systems increased, VLB adherence became added difficult to manage. The deeply accompanying bounded bus architecture that gave VLB it's acceleration became added antipathetic of timing variations - conspicuously accomplished 40mhz. Intel's aboriginal 50mhz 486 processor faced adversity in the bazaar as abounding absolute motherboards (even non-VLB designs) did not cope able-bodied with the access in foreground ancillary bus acceleration to 50mhz. If one could accomplish reliable operation of VLB at 50mhz it was acutely fast - but afresh this was awfully difficult to achieve, and generally it was apparent not to be accessible with a accustomed accouterments configuration.2 The 486DX-50's successor, the 486DX2-66 baffled this botheration by application a slower but added accordant bus acceleration (33mhz) and application a muliplier (x2) to acquire the processor alarm speed.
80486 dependence. The VESA Bounded Bus relied heavily on the Intel 80486 CPU's anamnesis bus design.citation needed If the Pentium processor accustomed there were above differences in its bus design, and was not calmly adjustable to a VESA Bounded Bus implementation. Few Pentium motherboards with VLB slots were anytime made. Aswell affective the bus to non-x86 architectures was about impossible.
Bound amount of slots available. Most PCs that acclimated VESA Bounded Bus had alone one or two VLB able ISA slots from the 5 or 6 accessible (thus 4 ISA slots about were just that, ISA only). This was a aftereffect of VESA Bounded Bus getting a absolute annex of the 80486 anamnesis bus. The processor did not accept the electrical adeptness to accurately drive (signal and power) added than 2 or 3citation needed accessories at a time anon from this bus.
Believability problems. The austere electrical limitations on the bus aswell bargain any "safety margin" accessible - abnormally influencing reliability. Glitches amid cards were common, as the alternation amid alone cards, combinations of cards, motherboard implementation, and even the processor itself was difficult to predict. This was abnormally accustomed on lower-end motherboards, as the accession of added VLB cards could beat an already bordering implementation. Results could be rather amazing if generally important accessories such as harder deejay controllers were complex with a bus battle with a anamnesis accelerated accessory such as the all-over video card. As VLB accessories had absolute accelerated admission to arrangement anamnesis at the aforementioned akin as the capital processor, there was no way for the arrangement to arbitrate if accessories were mis-configured or became unstable. If two accessories overwrote the aforementioned anamnesis area in a conflict, and the harder deejay ambassador relied on this area (the HDD ambassador generally getting the 2nd adverse device) there was the all-too-common achievability of massive abstracts corruption.
Bound scalability. As bus speeds of 486 systems increased, VLB adherence became added difficult to manage. The deeply accompanying bounded bus architecture that gave VLB it's acceleration became added antipathetic of timing variations - conspicuously accomplished 40mhz. Intel's aboriginal 50mhz 486 processor faced adversity in the bazaar as abounding absolute motherboards (even non-VLB designs) did not cope able-bodied with the access in foreground ancillary bus acceleration to 50mhz. If one could accomplish reliable operation of VLB at 50mhz it was acutely fast - but afresh this was awfully difficult to achieve, and generally it was apparent not to be accessible with a accustomed accouterments configuration.2 The 486DX-50's successor, the 486DX2-66 baffled this botheration by application a slower but added accordant bus acceleration (33mhz) and application a muliplier (x2) to acquire the processor alarm speed.
Installation woes.
The breadth of the aperture and amount of pins fabricated VLB cards awfully difficult to install and remove. The arduous automated accomplishment appropriate was demanding to both the agenda and the motherboard, and breakages were not uncommon. This was circuitous by the continued breadth of the agenda argumentation board; generally there was not abundant allowance in the PC case to bend the agenda into the slot, acute it to be pushed with abundant force beeline down into the slot. To abstain boundless coil of the motherboard during this activity the anatomy and motherboard had to be advised with good, almost carefully spaced supports for the motherboard, which was not consistently the case, and the being inserting the lath had to deliver the bottomward force analogously beyond its top edge. The breadth of a VLB slot, and the difficult accession that resulted from it, led to an alternating amplification of the acronym: Very Long Bus.
Legacy
Despite these problems, the VESA Local Bus became actual commonplace on after 486 motherboards, with a majority of after (post 1993) 486-based systems featuring a VESA Local Bus video card. VLB chiefly offered an affordable top acceleration interface for customer systems, as alone by 1996 was PCI frequently accessible alfresco of the server bazaar via the Pentium and Intel's Triton chipset. PCI aswell displaced the VESA Local Bus in the actual 486 market, with some of the endure 80486 motherboards featuring PCI slots instead of VLB slots. However a lot of still had either PCI or VLB slots alongside the still-ubiquitous ISA slots, and alleged "VIP" (VESA/ISA/PCI) boards with all three aperture types were aswell produced.
Technical data
Bus amplitude 32 bits
Compatible with 8 bit ISA, 16 bit ISA, VLB
Pins 112
Vcc +5 V
Clock 486SX-25: 25 MHz
486DX2-50: 25 MHz
486DX-33: 33 MHz
486DX2-66: 33 MHz
486DX4-100: 33 MHz
486DX-40: 40 MHz
486DX2-80: 40 MHz
486DX4-120: 40 MHz
5x86@133 MHz: 33 MHz
5x86@160 MHz: 40 MHz
486DX-50: 50 MHz (out of specification)
Compatible with 8 bit ISA, 16 bit ISA, VLB
Pins 112
Vcc +5 V
Clock 486SX-25: 25 MHz
486DX2-50: 25 MHz
486DX-33: 33 MHz
486DX2-66: 33 MHz
486DX4-100: 33 MHz
486DX-40: 40 MHz
486DX2-80: 40 MHz
486DX4-120: 40 MHz
5x86@133 MHz: 33 MHz
5x86@160 MHz: 40 MHz
486DX-50: 50 MHz (out of specification)
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